Epyc 7343 Firmware
by AMD
CVEs (96)
| CVE | Vendor / Product | Sev | Risk | CVSS | EPSS | KEV | Published | Description |
|---|---|---|---|---|---|---|---|---|
| CVE-2022-23818 | Hig | 0.49 | 7.5 | 0.01 | May 9, 2023 | Insufficient input validation on the model specific register: VM_HSAVE_PA may potentially lead to loss of SEV-SNP guest memory integrity. | ||
| CVE-2021-46764 | Hig | 0.49 | 7.5 | 0.01 | May 9, 2023 | Improper validation of DRAM addresses in SMU may allow an attacker to overwrite sensitive memory locations within the ASP potentially resulting in a denial of service. | ||
| CVE-2021-46763 | Hig | 0.49 | 7.5 | 0.00 | May 9, 2023 | Insufficient input validation in the SMU may enable a privileged attacker to write beyond the intended bounds of a shared memory buffer potentially leading to a loss of integrity. | ||
| CVE-2023-20531 | Hig | 0.49 | 7.5 | 0.01 | Jan 11, 2023 | Insufficient bound checks in the SMU may allow an attacker to update the SRAM from/to address space to an invalid value potentially resulting in a denial of service. | ||
| CVE-2023-20530 | Hig | 0.49 | 7.5 | 0.01 | Jan 11, 2023 | Insufficient input validation of BIOS mailbox messages in SMU may result in out-of-bounds memory reads potentially resulting in a denial of service. | ||
| CVE-2023-20529 | Hig | 0.49 | 7.5 | 0.01 | Jan 11, 2023 | Insufficient bound checks in the SMU may allow an attacker to update the from/to address space to an invalid value potentially resulting in a denial of service. | ||
| CVE-2021-26338 | Hig | 0.49 | 7.5 | 0.01 | Nov 16, 2021 | Improper access controls in System Management Unit (SMU) may allow for an attacker to override performance control tables located in DRAM resulting in a potential lack of system resources. | ||
| CVE-2021-26322 | Hig | 0.49 | 7.5 | 0.01 | Nov 16, 2021 | Persistent platform private key may not be protected with a random IV leading to a potential “two time pad attack”. | ||
| CVE-2020-12988 | Hig | 0.49 | 7.5 | 0.01 | Jun 11, 2021 | A potential denial of service (DoS) vulnerability exists in the integrated chipset that may allow a malicious attacker to hang the system when it is rebooted. | ||
| CVE-2021-26356 | Hig | 0.48 | 7.4 | 0.00 | May 9, 2023 | A TOCTOU in ASP bootloader may allow an attacker to tamper with the SPI ROM following data read to memory potentially resulting in S3 data corruption and information disclosure. | ||
| CVE-2021-26344 | Hig | 0.47 | 7.2 | 0.00 | Aug 13, 2024 | An out of bounds memory write when processing the AMD PSP1 Configuration Block (APCB) could allow an attacker with access the ability to modify the BIOS image, and the ability to sign the resulting image, to potentially modify the APCB block resulting in arbitrary code execution. | ||
| CVE-2021-26397 | Hig | 0.46 | 7.1 | 0.00 | May 9, 2023 | Insufficient address validation, may allow an attacker with a compromised ABL and UApp to corrupt sensitive memory locations potentially resulting in a loss of integrity or availability. | ||
| CVE-2021-26402 | Hig | 0.46 | 7.1 | 0.00 | Jan 11, 2023 | Insufficient bounds checking in ASP (AMD Secure Processor) firmware while handling BIOS mailbox commands, may allow an attacker to write partially-controlled data out-of-bounds to SMM or SEV-ES regions which may lead to a potential loss of integrity and availability. | ||
| CVE-2021-26370 | Hig | 0.46 | 7.1 | 0.00 | May 10, 2022 | Improper validation of destination address in SVC_LOAD_FW_IMAGE_BY_INSTANCE and SVC_LOAD_BINARY_BY_ATTRIB in a malicious UApp or ABL may allow an attacker to overwrite arbitrary bootloader memory with SPI ROM contents resulting in a loss of integrity and availability. | ||
| CVE-2021-26332 | Hig | 0.46 | 7.1 | 0.00 | May 10, 2022 | Failure to verify SEV-ES TMR is not in MMIO space, SEV-ES FW could result in a potential loss of integrity or availability. | ||
| CVE-2020-12951 | Hig | 0.46 | 7.0 | 0.00 | Nov 16, 2021 | Race condition in ASP firmware could allow less privileged x86 code to perform ASP SMM (System Management Mode) operations. | ||
| CVE-2020-12946 | Hig | 0.46 | 7.1 | 0.00 | Nov 16, 2021 | Insufficient input validation in ASP firmware for discrete TPM commands could allow a potential loss of integrity and denial of service. | ||
| CVE-2021-46774 | Med | 0.44 | 6.7 | 0.01 | Nov 14, 2023 | Insufficient DRAM address validation in System Management Unit (SMU) may allow an attacker to read/write from/to an invalid DRAM address, potentially resulting in denial-of-service. | ||
| CVE-2021-46775 | Med | 0.44 | 6.8 | 0.00 | May 9, 2023 | Improper input validation in ABL may enable an attacker with physical access, to perform arbitrary memory overwrites, potentially leading to a loss of integrity and code execution. | ||
| CVE-2023-20591 | Med | 0.42 | 6.5 | 0.00 | Aug 13, 2024 | Improper re-initialization of IOMMU during the DRTM event may permit an untrusted platform configuration to persist, allowing an attacker to read or modify hypervisor memory, potentially resulting in loss of confidentiality, integrity, and availability. |
- risk 0.49cvss 7.5epss 0.01
Insufficient input validation on the model specific register: VM_HSAVE_PA may potentially lead to loss of SEV-SNP guest memory integrity.
- risk 0.49cvss 7.5epss 0.01
Improper validation of DRAM addresses in SMU may allow an attacker to overwrite sensitive memory locations within the ASP potentially resulting in a denial of service.
- risk 0.49cvss 7.5epss 0.00
Insufficient input validation in the SMU may enable a privileged attacker to write beyond the intended bounds of a shared memory buffer potentially leading to a loss of integrity.
- risk 0.49cvss 7.5epss 0.01
Insufficient bound checks in the SMU may allow an attacker to update the SRAM from/to address space to an invalid value potentially resulting in a denial of service.
- risk 0.49cvss 7.5epss 0.01
Insufficient input validation of BIOS mailbox messages in SMU may result in out-of-bounds memory reads potentially resulting in a denial of service.
- risk 0.49cvss 7.5epss 0.01
Insufficient bound checks in the SMU may allow an attacker to update the from/to address space to an invalid value potentially resulting in a denial of service.
- risk 0.49cvss 7.5epss 0.01
Improper access controls in System Management Unit (SMU) may allow for an attacker to override performance control tables located in DRAM resulting in a potential lack of system resources.
- risk 0.49cvss 7.5epss 0.01
Persistent platform private key may not be protected with a random IV leading to a potential “two time pad attack”.
- risk 0.49cvss 7.5epss 0.01
A potential denial of service (DoS) vulnerability exists in the integrated chipset that may allow a malicious attacker to hang the system when it is rebooted.
- risk 0.48cvss 7.4epss 0.00
A TOCTOU in ASP bootloader may allow an attacker to tamper with the SPI ROM following data read to memory potentially resulting in S3 data corruption and information disclosure.
- risk 0.47cvss 7.2epss 0.00
An out of bounds memory write when processing the AMD PSP1 Configuration Block (APCB) could allow an attacker with access the ability to modify the BIOS image, and the ability to sign the resulting image, to potentially modify the APCB block resulting in arbitrary code execution.
- risk 0.46cvss 7.1epss 0.00
Insufficient address validation, may allow an attacker with a compromised ABL and UApp to corrupt sensitive memory locations potentially resulting in a loss of integrity or availability.
- risk 0.46cvss 7.1epss 0.00
Insufficient bounds checking in ASP (AMD Secure Processor) firmware while handling BIOS mailbox commands, may allow an attacker to write partially-controlled data out-of-bounds to SMM or SEV-ES regions which may lead to a potential loss of integrity and availability.
- risk 0.46cvss 7.1epss 0.00
Improper validation of destination address in SVC_LOAD_FW_IMAGE_BY_INSTANCE and SVC_LOAD_BINARY_BY_ATTRIB in a malicious UApp or ABL may allow an attacker to overwrite arbitrary bootloader memory with SPI ROM contents resulting in a loss of integrity and availability.
- risk 0.46cvss 7.1epss 0.00
Failure to verify SEV-ES TMR is not in MMIO space, SEV-ES FW could result in a potential loss of integrity or availability.
- risk 0.46cvss 7.0epss 0.00
Race condition in ASP firmware could allow less privileged x86 code to perform ASP SMM (System Management Mode) operations.
- risk 0.46cvss 7.1epss 0.00
Insufficient input validation in ASP firmware for discrete TPM commands could allow a potential loss of integrity and denial of service.
- risk 0.44cvss 6.7epss 0.01
Insufficient DRAM address validation in System Management Unit (SMU) may allow an attacker to read/write from/to an invalid DRAM address, potentially resulting in denial-of-service.
- risk 0.44cvss 6.8epss 0.00
Improper input validation in ABL may enable an attacker with physical access, to perform arbitrary memory overwrites, potentially leading to a loss of integrity and code execution.
- risk 0.42cvss 6.5epss 0.00
Improper re-initialization of IOMMU during the DRTM event may permit an untrusted platform configuration to persist, allowing an attacker to read or modify hypervisor memory, potentially resulting in loss of confidentiality, integrity, and availability.
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