Core I5 10505 Firmware
by Intel
CVEs (28)
| CVE | Vendor / Product | Sev | Risk | CVSS | EPSS | KEV | Published | Description |
|---|---|---|---|---|---|---|---|---|
| CVE-2022-21198 | Hig | 0.51 | 7.9 | 0.00 | Nov 11, 2022 | Time-of-check time-of-use race condition in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access. | ||
| CVE-2021-33123 | Hig | 0.51 | 7.8 | 0.00 | May 12, 2022 | Improper access control in the BIOS authenticated code module for some Intel(R) Processors may allow a privileged user to potentially enable aescalation of privilege via local access. | ||
| CVE-2021-33122 | Hig | 0.51 | 7.8 | 0.00 | May 12, 2022 | Insufficient control flow management in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable aescalation of privilege via local access. | ||
| CVE-2021-0156 | Hig | 0.51 | 7.8 | 0.00 | Feb 9, 2022 | Improper input validation in the firmware for some Intel(R) Processors may allow an authenticated user to potentially enable an escalation of privilege via local access. | ||
| CVE-2021-0117 | Hig | 0.51 | 7.8 | 0.00 | Feb 9, 2022 | Pointer issues in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable an escalation of privilege via local access. | ||
| CVE-2021-0116 | Hig | 0.51 | 7.8 | 0.00 | Feb 9, 2022 | Out-of-bounds write in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable an escalation of privilege via local access. | ||
| CVE-2020-0110 | Hig | 0.51 | 7.8 | 0.00 | May 14, 2020 | In psi_write of psi.c, there is a possible out of bounds write due to a missing bounds check. This could lead to local escalation of privilege with no additional execution privileges needed. User interaction is not needed for exploitation.Product: AndroidVersions: Android… | ||
| CVE-2022-33894 | Hig | 0.49 | 7.5 | 0.00 | May 10, 2023 | Improper input validation in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access. | ||
| CVE-2022-30704 | Hig | 0.47 | 7.2 | 0.00 | Feb 16, 2023 | Improper initialization in the Intel(R) TXT SINIT ACM for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access. | ||
| CVE-2022-44611 | Med | 0.45 | 6.9 | 0.00 | Aug 11, 2023 | Improper input validation in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via adjacent access. | ||
| CVE-2022-0004 | Med | 0.44 | 6.8 | 0.00 | May 12, 2022 | Hardware debug modes and processor INIT setting that allow override of locks for some Intel(R) Processors in Intel(R) Boot Guard and Intel(R) TXT may allow an unauthenticated user to potentially enable escalation of privilege via physical access. | ||
| CVE-2021-33124 | Med | 0.44 | 6.7 | 0.00 | May 12, 2022 | Out-of-bounds write in the BIOS authenticated code module for some Intel(R) Processors may allow a privileged user to potentially enable aescalation of privilege via local access. | ||
| CVE-2021-0118 | Med | 0.44 | 6.7 | 0.00 | Feb 9, 2022 | Out-of-bounds read in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable an escalation of privilege via local access. | ||
| CVE-2021-0186 | Med | 0.44 | 6.7 | 0.00 | Nov 17, 2021 | Improper input validation in the Intel(R) SGX SDK applications compiled for SGX2 enabled processors may allow a privileged user to potentially escalation of privilege via local access. | ||
| CVE-2022-40982 | Med | 0.43 | 6.5 | 0.03 | Aug 11, 2023 | Information exposure through microarchitectural state after transient execution in certain vector execution units for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. | ||
| CVE-2021-0125 | Med | 0.43 | 6.6 | 0.00 | Feb 9, 2022 | Improper initialization in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via physical access. | ||
| CVE-2021-0124 | Med | 0.43 | 6.6 | 0.00 | Feb 9, 2022 | Improper access control in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via physical access. | ||
| CVE-2021-0119 | Med | 0.40 | 6.2 | 0.00 | Feb 9, 2022 | Improper initialization in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via physical access. | ||
| CVE-2022-38090 | Med | 0.39 | 6.0 | 0.00 | Feb 16, 2023 | Improper isolation of shared resources in some Intel(R) Processors when using Intel(R) Software Guard Extensions may allow a privileged user to potentially enable information disclosure via local access. | ||
| CVE-2022-26373 | Med | 0.36 | 5.5 | 0.00 | Aug 18, 2022 | Non-transparent sharing of return predictor targets between contexts in some Intel(R) Processors may allow an authorized user to potentially enable information disclosure via local access. |
- risk 0.51cvss 7.9epss 0.00
Time-of-check time-of-use race condition in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access.
- risk 0.51cvss 7.8epss 0.00
Improper access control in the BIOS authenticated code module for some Intel(R) Processors may allow a privileged user to potentially enable aescalation of privilege via local access.
- risk 0.51cvss 7.8epss 0.00
Insufficient control flow management in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable aescalation of privilege via local access.
- risk 0.51cvss 7.8epss 0.00
Improper input validation in the firmware for some Intel(R) Processors may allow an authenticated user to potentially enable an escalation of privilege via local access.
- risk 0.51cvss 7.8epss 0.00
Pointer issues in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable an escalation of privilege via local access.
- risk 0.51cvss 7.8epss 0.00
Out-of-bounds write in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable an escalation of privilege via local access.
- risk 0.51cvss 7.8epss 0.00
In psi_write of psi.c, there is a possible out of bounds write due to a missing bounds check. This could lead to local escalation of privilege with no additional execution privileges needed. User interaction is not needed for exploitation.Product: AndroidVersions: Android…
- risk 0.49cvss 7.5epss 0.00
Improper input validation in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access.
- risk 0.47cvss 7.2epss 0.00
Improper initialization in the Intel(R) TXT SINIT ACM for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access.
- risk 0.45cvss 6.9epss 0.00
Improper input validation in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via adjacent access.
- risk 0.44cvss 6.8epss 0.00
Hardware debug modes and processor INIT setting that allow override of locks for some Intel(R) Processors in Intel(R) Boot Guard and Intel(R) TXT may allow an unauthenticated user to potentially enable escalation of privilege via physical access.
- risk 0.44cvss 6.7epss 0.00
Out-of-bounds write in the BIOS authenticated code module for some Intel(R) Processors may allow a privileged user to potentially enable aescalation of privilege via local access.
- risk 0.44cvss 6.7epss 0.00
Out-of-bounds read in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable an escalation of privilege via local access.
- risk 0.44cvss 6.7epss 0.00
Improper input validation in the Intel(R) SGX SDK applications compiled for SGX2 enabled processors may allow a privileged user to potentially escalation of privilege via local access.
- risk 0.43cvss 6.5epss 0.03
Information exposure through microarchitectural state after transient execution in certain vector execution units for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
- risk 0.43cvss 6.6epss 0.00
Improper initialization in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via physical access.
- risk 0.43cvss 6.6epss 0.00
Improper access control in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via physical access.
- risk 0.40cvss 6.2epss 0.00
Improper initialization in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via physical access.
- risk 0.39cvss 6.0epss 0.00
Improper isolation of shared resources in some Intel(R) Processors when using Intel(R) Software Guard Extensions may allow a privileged user to potentially enable information disclosure via local access.
- risk 0.36cvss 5.5epss 0.00
Non-transparent sharing of return predictor targets between contexts in some Intel(R) Processors may allow an authorized user to potentially enable information disclosure via local access.
Page 1 of 2