rpm package
opensuse/spectre-meltdown-checker&distro=openSUSE Tumbleweed
pkg:rpm/opensuse/spectre-meltdown-checker&distro=openSUSE%20Tumbleweed
Vulnerabilities (31)
| CVE | Sev | CVSS | KEV | Affected versions | Fixed in | Published | Description |
|---|---|---|---|---|---|---|---|
| CVE-2025-54505 | Low | — | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Apr 27, 2026 | A transient execution vulnerability within AMD CPUs may allow a local user-privileged attacker to leak data via the floating point divisor unit, potentially resulting in loss of confidentiality. | |
| CVE-2025-29943 | Med | — | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Jan 16, 2026 | Write what were condition within AMD CPUs may allow an admin-privileged attacker to modify the configuration of the CPU pipeline potentially resulting in the corruption of the stack pointer inside an SEV-SNP guest. | |
| CVE-2025-40300 | Med | 5.5 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Sep 11, 2025 | In the Linux kernel, the following vulnerability has been resolved: x86/vmscape: Add conditional IBPB mitigation VMSCAPE is a vulnerability that exploits insufficient branch predictor isolation between a guest and a userspace hypervisor (like QEMU). Existing mitigations already | |
| CVE-2024-36350 | Med | 5.6 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Jul 8, 2025 | A transient execution vulnerability in some AMD processors may allow an attacker to infer data from previous stores, potentially resulting in the leakage of privileged information. | |
| CVE-2025-24495 | Med | 5.6 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | May 13, 2025 | Incorrect initialization of resource in the branch prediction unit for some Intel(R) Core™ Ultra Processors may allow an authenticated user to potentially enable information disclosure via local access. | |
| CVE-2025-20623 | Med | 5.6 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | May 13, 2025 | Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel(R) Core™ processors (10th Generation) may allow an authenticated user to potentially enable information disclosure via local access. | |
| CVE-2024-45332 | Med | 5.6 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | May 13, 2025 | Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch predictors for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. | |
| CVE-2024-28956 | Med | 5.6 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | May 13, 2025 | Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. | |
| CVE-2024-56161 | Hig | 7.2 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Feb 3, 2025 | Improper signature verification in AMD CPU ROM microcode patch loader may allow an attacker with local administrator privilege to load malicious CPU microcode resulting in loss of confidentiality and integrity of a confidential guest running under AMD SEV-SNP. | |
| CVE-2024-7881 | Med | 5.1 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Jan 28, 2025 | An unprivileged context can trigger a data memory-dependent prefetch engine to fetch the contents of a privileged location and consume those contents as an address that is also dereferenced. | |
| CVE-2023-31315 | Hig | 7.5 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Aug 12, 2024 | Improper validation in a model specific register (MSR) could allow a malicious program with ring0 access to modify SMM configuration while SMI lock is enabled, potentially leading to arbitrary code execution. | |
| CVE-2023-28746 | Med | 6.5 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Mar 14, 2024 | Information exposure through microarchitectural state after transient execution from some register files for some Intel(R) Atom(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. | |
| CVE-2023-23583 | Hig | 8.8 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Nov 14, 2023 | Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege and/or information disclosure and/or denial of service via local access. | |
| CVE-2023-20588 | Med | 5.5 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Aug 8, 2023 | A division-by-zero error on some AMD processors can potentially return speculative data resulting in loss of confidentiality. | |
| CVE-2023-20569 | Med | 4.7 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Aug 8, 2023 | A side channel vulnerability on some of the AMD CPUs may allow an attacker to influence the return address prediction. This may result in speculative execution at an attacker-controlled address, potentially leading to information disclosure. | |
| CVE-2023-20593 | Med | 5.5 | < 0.46-1.1 | 0.46-1.1 | Jul 24, 2023 | An issue in “Zen 2” CPUs, under specific microarchitectural circumstances, may allow an attacker to potentially access sensitive information. | |
| CVE-2022-29901 | Med | 5.6 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Jul 12, 2022 | Intel microprocessor generations 6 to 8 are affected by a new Spectre variant that is able to bypass their retpoline mitigation in the kernel to leak arbitrary data. An attacker with unprivileged user access can hijack return instructions to achieve arbitrary speculative code exe | |
| CVE-2022-29900 | Med | 6.5 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Jul 12, 2022 | Mis-trained branch predictions for return instructions may allow arbitrary speculative code execution under certain microarchitecture-dependent conditions. | |
| CVE-2022-21123 | Med | 5.5 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Jun 15, 2022 | Incomplete cleanup of multi-core shared buffers for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. | |
| CVE-2020-12965 | Hig | 7.5 | < 26.36.0602723-1.1 | 26.36.0602723-1.1 | Feb 4, 2022 | When combined with specific software sequences, AMD CPUs may transiently execute non-canonical loads and store using only the lower 48 address bits potentially resulting in data leakage. |
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
A transient execution vulnerability within AMD CPUs may allow a local user-privileged attacker to leak data via the floating point divisor unit, potentially resulting in loss of confidentiality.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
Write what were condition within AMD CPUs may allow an admin-privileged attacker to modify the configuration of the CPU pipeline potentially resulting in the corruption of the stack pointer inside an SEV-SNP guest.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
In the Linux kernel, the following vulnerability has been resolved: x86/vmscape: Add conditional IBPB mitigation VMSCAPE is a vulnerability that exploits insufficient branch predictor isolation between a guest and a userspace hypervisor (like QEMU). Existing mitigations already
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
A transient execution vulnerability in some AMD processors may allow an attacker to infer data from previous stores, potentially resulting in the leakage of privileged information.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
Incorrect initialization of resource in the branch prediction unit for some Intel(R) Core™ Ultra Processors may allow an authenticated user to potentially enable information disclosure via local access.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel(R) Core™ processors (10th Generation) may allow an authenticated user to potentially enable information disclosure via local access.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch predictors for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
Improper signature verification in AMD CPU ROM microcode patch loader may allow an attacker with local administrator privilege to load malicious CPU microcode resulting in loss of confidentiality and integrity of a confidential guest running under AMD SEV-SNP.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
An unprivileged context can trigger a data memory-dependent prefetch engine to fetch the contents of a privileged location and consume those contents as an address that is also dereferenced.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
Improper validation in a model specific register (MSR) could allow a malicious program with ring0 access to modify SMM configuration while SMI lock is enabled, potentially leading to arbitrary code execution.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
Information exposure through microarchitectural state after transient execution from some register files for some Intel(R) Atom(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege and/or information disclosure and/or denial of service via local access.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
A division-by-zero error on some AMD processors can potentially return speculative data resulting in loss of confidentiality.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
A side channel vulnerability on some of the AMD CPUs may allow an attacker to influence the return address prediction. This may result in speculative execution at an attacker-controlled address, potentially leading to information disclosure.
- affected < 0.46-1.1fixed 0.46-1.1
An issue in “Zen 2” CPUs, under specific microarchitectural circumstances, may allow an attacker to potentially access sensitive information.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
Intel microprocessor generations 6 to 8 are affected by a new Spectre variant that is able to bypass their retpoline mitigation in the kernel to leak arbitrary data. An attacker with unprivileged user access can hijack return instructions to achieve arbitrary speculative code exe
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
Mis-trained branch predictions for return instructions may allow arbitrary speculative code execution under certain microarchitecture-dependent conditions.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
Incomplete cleanup of multi-core shared buffers for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
- affected < 26.36.0602723-1.1fixed 26.36.0602723-1.1
When combined with specific software sequences, AMD CPUs may transiently execute non-canonical loads and store using only the lower 48 address bits potentially resulting in data leakage.
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