rpm package
suse/xen&distro=SUSE Linux Enterprise High Performance Computing 15 SP5-ESPOS
pkg:rpm/suse/xen&distro=SUSE%20Linux%20Enterprise%20High%20Performance%20Computing%2015%20SP5-ESPOS
Vulnerabilities (9)
| CVE | Sev | CVSS | KEV | Affected versions | Fixed in | Published | Description |
|---|---|---|---|---|---|---|---|
| CVE-2026-23554 | Hig | 7.8 | < 4.17.6_06-150500.3.62.2 | 4.17.6_06-150500.3.62.2 | Mar 23, 2026 | The Intel EPT paging code uses an optimization to defer flushing of any cached EPT state until the p2m lock is dropped, so that multiple modifications done under the same locked region only issue a single flush. Freeing of paging structures however is not deferred until the flus | |
| CVE-2025-58148 | — | < 4.17.5_12-150500.3.53.1 | 4.17.5_12-150500.3.53.1 | Oct 31, 2025 | [This CNA information record relates to multiple CVEs; the text explains which aspects/vulnerabilities correspond to which CVE.] Some Viridian hypercalls can specify a mask of vCPU IDs as an input, in one of three formats. Xen has boundary checking bugs with all three formats, | ||
| CVE-2025-58147 | — | < 4.17.5_12-150500.3.53.1 | 4.17.5_12-150500.3.53.1 | Oct 31, 2025 | [This CNA information record relates to multiple CVEs; the text explains which aspects/vulnerabilities correspond to which CVE.] Some Viridian hypercalls can specify a mask of vCPU IDs as an input, in one of three formats. Xen has boundary checking bugs with all three formats, | ||
| CVE-2025-58143 | — | < 4.17.5_12-150500.3.53.1 | 4.17.5_12-150500.3.53.1 | Sep 11, 2025 | [This CNA information record relates to multiple CVEs; the text explains which aspects/vulnerabilities correspond to which CVE.] There are multiple issues related to the handling and accessing of guest memory pages in the viridian code: 1. A NULL pointer dereference in the upd | ||
| CVE-2025-58142 | — | < 4.17.5_12-150500.3.53.1 | 4.17.5_12-150500.3.53.1 | Sep 11, 2025 | [This CNA information record relates to multiple CVEs; the text explains which aspects/vulnerabilities correspond to which CVE.] There are multiple issues related to the handling and accessing of guest memory pages in the viridian code: 1. A NULL pointer dereference in the upd | ||
| CVE-2025-27466 | — | < 4.17.5_12-150500.3.53.1 | 4.17.5_12-150500.3.53.1 | Sep 11, 2025 | [This CNA information record relates to multiple CVEs; the text explains which aspects/vulnerabilities correspond to which CVE.] There are multiple issues related to the handling and accessing of guest memory pages in the viridian code: 1. A NULL pointer dereference in the upd | ||
| CVE-2025-27465 | — | < 4.17.5_10-150500.3.50.1 | 4.17.5_10-150500.3.50.1 | Jul 16, 2025 | Certain instructions need intercepting and emulating by Xen. In some cases Xen emulates the instruction by replaying it, using an executable stub. Some instructions may raise an exception, which is supposed to be handled gracefully. Certain replayed instructions have additiona | ||
| CVE-2024-36357 | Med | 5.6 | < 4.17.5_10-150500.3.50.1 | 4.17.5_10-150500.3.50.1 | Jul 8, 2025 | A transient execution vulnerability in some AMD processors may allow an attacker to infer data in the L1D cache, potentially resulting in the leakage of sensitive information across privileged boundaries. | |
| CVE-2024-36350 | Med | 5.6 | < 4.17.5_10-150500.3.50.1 | 4.17.5_10-150500.3.50.1 | Jul 8, 2025 | A transient execution vulnerability in some AMD processors may allow an attacker to infer data from previous stores, potentially resulting in the leakage of privileged information. |
- affected < 4.17.6_06-150500.3.62.2fixed 4.17.6_06-150500.3.62.2
The Intel EPT paging code uses an optimization to defer flushing of any cached EPT state until the p2m lock is dropped, so that multiple modifications done under the same locked region only issue a single flush. Freeing of paging structures however is not deferred until the flus
- CVE-2025-58148Oct 31, 2025affected < 4.17.5_12-150500.3.53.1fixed 4.17.5_12-150500.3.53.1
[This CNA information record relates to multiple CVEs; the text explains which aspects/vulnerabilities correspond to which CVE.] Some Viridian hypercalls can specify a mask of vCPU IDs as an input, in one of three formats. Xen has boundary checking bugs with all three formats,
- CVE-2025-58147Oct 31, 2025affected < 4.17.5_12-150500.3.53.1fixed 4.17.5_12-150500.3.53.1
[This CNA information record relates to multiple CVEs; the text explains which aspects/vulnerabilities correspond to which CVE.] Some Viridian hypercalls can specify a mask of vCPU IDs as an input, in one of three formats. Xen has boundary checking bugs with all three formats,
- CVE-2025-58143Sep 11, 2025affected < 4.17.5_12-150500.3.53.1fixed 4.17.5_12-150500.3.53.1
[This CNA information record relates to multiple CVEs; the text explains which aspects/vulnerabilities correspond to which CVE.] There are multiple issues related to the handling and accessing of guest memory pages in the viridian code: 1. A NULL pointer dereference in the upd
- CVE-2025-58142Sep 11, 2025affected < 4.17.5_12-150500.3.53.1fixed 4.17.5_12-150500.3.53.1
[This CNA information record relates to multiple CVEs; the text explains which aspects/vulnerabilities correspond to which CVE.] There are multiple issues related to the handling and accessing of guest memory pages in the viridian code: 1. A NULL pointer dereference in the upd
- CVE-2025-27466Sep 11, 2025affected < 4.17.5_12-150500.3.53.1fixed 4.17.5_12-150500.3.53.1
[This CNA information record relates to multiple CVEs; the text explains which aspects/vulnerabilities correspond to which CVE.] There are multiple issues related to the handling and accessing of guest memory pages in the viridian code: 1. A NULL pointer dereference in the upd
- CVE-2025-27465Jul 16, 2025affected < 4.17.5_10-150500.3.50.1fixed 4.17.5_10-150500.3.50.1
Certain instructions need intercepting and emulating by Xen. In some cases Xen emulates the instruction by replaying it, using an executable stub. Some instructions may raise an exception, which is supposed to be handled gracefully. Certain replayed instructions have additiona
- affected < 4.17.5_10-150500.3.50.1fixed 4.17.5_10-150500.3.50.1
A transient execution vulnerability in some AMD processors may allow an attacker to infer data in the L1D cache, potentially resulting in the leakage of sensitive information across privileged boundaries.
- affected < 4.17.5_10-150500.3.50.1fixed 4.17.5_10-150500.3.50.1
A transient execution vulnerability in some AMD processors may allow an attacker to infer data from previous stores, potentially resulting in the leakage of privileged information.