VYPR
Unrated severityNVD Advisory· Published May 28, 2026

CVE-2026-46174

CVE-2026-46174

Description

In the Linux kernel, the following vulnerability has been resolved:

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

Make sure resources are not improperly shared in the op cache and cause instruction corruption this way.

AI Insight

LLM-synthesized narrative grounded in this CVE's description and references.

Improper isolation of shared resources in AMD Zen2 op cache can cause instruction corruption, fixed in Linux kernel commit f5bc3aef7df4.

Vulnerability

In the Linux kernel, the AMD Zen2 processor's op cache (micro-op cache) does not properly isolate shared resources, potentially leading to instruction corruption. This vulnerability affects kernel versions prior to the fix introduced in commit f5bc3aef7df4 [1].

Exploitation

The exact prerequisites for exploitation are not detailed in the available references. It is likely that an attacker requires local access to execute code that triggers the improper sharing of resources in the op cache. The specific sequence of steps to achieve instruction corruption has not been publicly disclosed [1].

Impact

Successful exploitation could result in instruction corruption, causing incorrect program execution. This may lead to denial of service, privilege escalation, or other unintended behavior depending on the corrupted instructions [1].

Mitigation

The vulnerability is fixed in Linux kernel commit f5bc3aef7df4 [1]. Users should update to a kernel version that includes this commit. No workarounds have been published. The fix is part of the stable kernel tree.

AI Insight generated on May 28, 2026. Synthesized from this CVE's description and the cited reference URLs; citations are validated against the source bundle.

Affected products

2

Patches

16
c21b90f77687

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.gitPrathyushi NangiaFixed in 7.1-rc4via kernel-cna
6 files changed · +14 6
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index a14a0f43e04ae8..86554de9a3f522 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -803,9 +803,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index a14a0f43e04ae8..86554de9a3f522 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -803,9 +803,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 2d9ae6ab1701c0..2f8e8ff2d000a7 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -989,6 +989,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     
     	/* Correct misconfigured CPUID on some clients. */
     	clear_cpu_cap(c, X86_FEATURE_INVLPGB);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 2d9ae6ab1701c0..2f8e8ff2d000a7 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -989,6 +989,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     
     	/* Correct misconfigured CPUID on some clients. */
     	clear_cpu_cap(c, X86_FEATURE_INVLPGB);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 6673601246b382..eff29645719bc7 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -793,9 +793,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 6673601246b382..eff29645719bc7 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -793,9 +793,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
1cd85a19748b

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.gitPrathyushi NangiaFixed in 7.0.7via kernel-cna
6 files changed · +14 6
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 92bb6b2f778e9d..4efbbf9d117b06 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -796,9 +796,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 92bb6b2f778e9d..4efbbf9d117b06 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -796,9 +796,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 9b9bf7df7aad06..820fee2658c6ae 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -988,6 +988,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     
     	/* Correct misconfigured CPUID on some clients. */
     	clear_cpu_cap(c, X86_FEATURE_INVLPGB);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 9b9bf7df7aad06..820fee2658c6ae 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -988,6 +988,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     
     	/* Correct misconfigured CPUID on some clients. */
     	clear_cpu_cap(c, X86_FEATURE_INVLPGB);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 6673601246b382..eff29645719bc7 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -793,9 +793,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 6673601246b382..eff29645719bc7 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -793,9 +793,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
f5bc3aef7df4

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.gitPrathyushi NangiaFixed in 5.15.207via kernel-cna
6 files changed · +14 2
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 2dff91cda82e6d..093d0bac794193 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -580,6 +580,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 2dff91cda82e6d..093d0bac794193 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -580,6 +580,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 5e284ccb3cc978..6c1ada204bcfa8 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1170,6 +1170,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     {
     	init_amd_zen_common();
     	init_spectral_chicken(c);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 5e284ccb3cc978..6c1ada204bcfa8 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1170,6 +1170,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     {
     	init_amd_zen_common();
     	init_spectral_chicken(c);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 2c0838ee3eacac..658570e4959d72 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -530,6 +530,9 @@
     
     #define MSR_AMD64_VIRT_SPEC_CTRL	0xc001011f
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 2c0838ee3eacac..658570e4959d72 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -530,6 +530,9 @@
     
     #define MSR_AMD64_VIRT_SPEC_CTRL	0xc001011f
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
ff6fc65b3bf7

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.gitPrathyushi NangiaFixed in 6.6.139via kernel-cna
6 files changed · +14 2
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index deb5fe00177630..c9f83af0e0b784 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -675,6 +675,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index deb5fe00177630..c9f83af0e0b784 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -675,6 +675,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 211141d37d1555..c5bcf438483060 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1166,6 +1166,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     		msr_clear_bit(MSR_AMD64_CPUID_FN_7, 18);
     		pr_emerg("RDSEED is not reliable on this platform; disabling.\n");
     	}
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 211141d37d1555..c5bcf438483060 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1166,6 +1166,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     		msr_clear_bit(MSR_AMD64_CPUID_FN_7, 18);
     		pr_emerg("RDSEED is not reliable on this platform; disabling.\n");
     	}
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 76f9cad9fb62b1..d108bc6634ed4d 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -638,6 +638,9 @@
     /* AMD Last Branch Record MSRs */
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 76f9cad9fb62b1..d108bc6634ed4d 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -638,6 +638,9 @@
     /* AMD Last Branch Record MSRs */
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
9109489cc8c3

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.gitPrathyushi NangiaFixed in 6.12.88via kernel-cna
6 files changed · +14 6
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 7eb26f7719544d..3eaa7284f9ec9a 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -734,9 +734,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 7eb26f7719544d..3eaa7284f9ec9a 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -734,9 +734,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 05e2e3c32707aa..fb9558521987db 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -989,6 +989,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     		msr_clear_bit(MSR_AMD64_CPUID_FN_7, 18);
     		pr_emerg("RDSEED is not reliable on this platform; disabling.\n");
     	}
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 05e2e3c32707aa..fb9558521987db 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -989,6 +989,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     		msr_clear_bit(MSR_AMD64_CPUID_FN_7, 18);
     		pr_emerg("RDSEED is not reliable on this platform; disabling.\n");
     	}
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 3deb6c11f13441..b6102ad54341f1 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -717,8 +717,9 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 3deb6c11f13441..b6102ad54341f1 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -717,8 +717,9 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
28f5ed477eef

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.gitPrathyushi NangiaFixed in 6.18.30via kernel-cna
6 files changed · +14 6
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 66ddea295c2669..d0a0cc8e8bd999 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -767,9 +767,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 66ddea295c2669..d0a0cc8e8bd999 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -767,9 +767,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index ec965de4abec9f..138ff22a4926a8 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -994,6 +994,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     
     	/* Correct misconfigured CPUID on some clients. */
     	clear_cpu_cap(c, X86_FEATURE_INVLPGB);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index ec965de4abec9f..138ff22a4926a8 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -994,6 +994,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     
     	/* Correct misconfigured CPUID on some clients. */
     	clear_cpu_cap(c, X86_FEATURE_INVLPGB);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 9e1720d73244f6..7de315d8b24603 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -761,9 +761,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 9e1720d73244f6..7de315d8b24603 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -761,9 +761,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
1e23b30a80b1

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.gitPrathyushi NangiaFixed in 5.10.256via kernel-cna
6 files changed · +14 2
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 390db709b432f4..59bee2206d979e 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -570,6 +570,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 390db709b432f4..59bee2206d979e 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -570,6 +570,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 3a446f2b6d30c2..519e388083b2ac 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1197,6 +1197,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     {
     	init_amd_zen_common();
     	init_spectral_chicken(c);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 3a446f2b6d30c2..519e388083b2ac 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1197,6 +1197,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     {
     	init_amd_zen_common();
     	init_spectral_chicken(c);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 8fb9256768134d..c28d75fe4dee41 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -523,6 +523,9 @@
     
     #define MSR_AMD64_VIRT_SPEC_CTRL	0xc001011f
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 8fb9256768134d..c28d75fe4dee41 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -523,6 +523,9 @@
     
     #define MSR_AMD64_VIRT_SPEC_CTRL	0xc001011f
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
251497955f23

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.gitPrathyushi NangiaFixed in 6.1.173via kernel-cna
6 files changed · +14 2
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 5b8268afc0358c..b05866fd2b73fd 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -672,6 +672,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 5b8268afc0358c..b05866fd2b73fd 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -672,6 +672,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index f5df16d77d5570..df6dbeeca5565e 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1146,6 +1146,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     {
     	init_amd_zen_common();
     	init_spectral_chicken(c);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index f5df16d77d5570..df6dbeeca5565e 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1146,6 +1146,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     {
     	init_amd_zen_common();
     	init_spectral_chicken(c);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index f17ade084720d5..f4110adf086c4d 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -598,6 +598,9 @@
     /* AMD Last Branch Record MSRs */
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index f17ade084720d5..f4110adf086c4d 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -598,6 +598,9 @@
     /* AMD Last Branch Record MSRs */
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
1e23b30a80b1

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

6 files changed · +14 2
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 390db709b432f4..59bee2206d979e 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -570,6 +570,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 390db709b432f4..59bee2206d979e 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -570,6 +570,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 3a446f2b6d30c2..519e388083b2ac 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1197,6 +1197,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     {
     	init_amd_zen_common();
     	init_spectral_chicken(c);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 3a446f2b6d30c2..519e388083b2ac 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1197,6 +1197,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     {
     	init_amd_zen_common();
     	init_spectral_chicken(c);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 8fb9256768134d..c28d75fe4dee41 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -523,6 +523,9 @@
     
     #define MSR_AMD64_VIRT_SPEC_CTRL	0xc001011f
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 8fb9256768134d..c28d75fe4dee41 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -523,6 +523,9 @@
     
     #define MSR_AMD64_VIRT_SPEC_CTRL	0xc001011f
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
1cd85a19748b

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

6 files changed · +14 6
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 92bb6b2f778e9d..4efbbf9d117b06 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -796,9 +796,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 92bb6b2f778e9d..4efbbf9d117b06 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -796,9 +796,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 9b9bf7df7aad06..820fee2658c6ae 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -988,6 +988,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     
     	/* Correct misconfigured CPUID on some clients. */
     	clear_cpu_cap(c, X86_FEATURE_INVLPGB);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 9b9bf7df7aad06..820fee2658c6ae 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -988,6 +988,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     
     	/* Correct misconfigured CPUID on some clients. */
     	clear_cpu_cap(c, X86_FEATURE_INVLPGB);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 6673601246b382..eff29645719bc7 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -793,9 +793,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 6673601246b382..eff29645719bc7 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -793,9 +793,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
c21b90f77687

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

6 files changed · +14 6
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index a14a0f43e04ae8..86554de9a3f522 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -803,9 +803,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index a14a0f43e04ae8..86554de9a3f522 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -803,9 +803,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 2d9ae6ab1701c0..2f8e8ff2d000a7 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -989,6 +989,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     
     	/* Correct misconfigured CPUID on some clients. */
     	clear_cpu_cap(c, X86_FEATURE_INVLPGB);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 2d9ae6ab1701c0..2f8e8ff2d000a7 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -989,6 +989,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     
     	/* Correct misconfigured CPUID on some clients. */
     	clear_cpu_cap(c, X86_FEATURE_INVLPGB);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 6673601246b382..eff29645719bc7 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -793,9 +793,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 6673601246b382..eff29645719bc7 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -793,9 +793,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
ff6fc65b3bf7

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

6 files changed · +14 2
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index deb5fe00177630..c9f83af0e0b784 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -675,6 +675,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index deb5fe00177630..c9f83af0e0b784 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -675,6 +675,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 211141d37d1555..c5bcf438483060 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1166,6 +1166,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     		msr_clear_bit(MSR_AMD64_CPUID_FN_7, 18);
     		pr_emerg("RDSEED is not reliable on this platform; disabling.\n");
     	}
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 211141d37d1555..c5bcf438483060 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1166,6 +1166,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     		msr_clear_bit(MSR_AMD64_CPUID_FN_7, 18);
     		pr_emerg("RDSEED is not reliable on this platform; disabling.\n");
     	}
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 76f9cad9fb62b1..d108bc6634ed4d 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -638,6 +638,9 @@
     /* AMD Last Branch Record MSRs */
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 76f9cad9fb62b1..d108bc6634ed4d 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -638,6 +638,9 @@
     /* AMD Last Branch Record MSRs */
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
f5bc3aef7df4

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

6 files changed · +14 2
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 2dff91cda82e6d..093d0bac794193 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -580,6 +580,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 2dff91cda82e6d..093d0bac794193 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -580,6 +580,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 5e284ccb3cc978..6c1ada204bcfa8 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1170,6 +1170,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     {
     	init_amd_zen_common();
     	init_spectral_chicken(c);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 5e284ccb3cc978..6c1ada204bcfa8 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1170,6 +1170,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     {
     	init_amd_zen_common();
     	init_spectral_chicken(c);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 2c0838ee3eacac..658570e4959d72 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -530,6 +530,9 @@
     
     #define MSR_AMD64_VIRT_SPEC_CTRL	0xc001011f
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 2c0838ee3eacac..658570e4959d72 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -530,6 +530,9 @@
     
     #define MSR_AMD64_VIRT_SPEC_CTRL	0xc001011f
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
9109489cc8c3

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

6 files changed · +14 6
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 7eb26f7719544d..3eaa7284f9ec9a 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -734,9 +734,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 7eb26f7719544d..3eaa7284f9ec9a 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -734,9 +734,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 05e2e3c32707aa..fb9558521987db 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -989,6 +989,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     		msr_clear_bit(MSR_AMD64_CPUID_FN_7, 18);
     		pr_emerg("RDSEED is not reliable on this platform; disabling.\n");
     	}
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index 05e2e3c32707aa..fb9558521987db 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -989,6 +989,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     		msr_clear_bit(MSR_AMD64_CPUID_FN_7, 18);
     		pr_emerg("RDSEED is not reliable on this platform; disabling.\n");
     	}
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 3deb6c11f13441..b6102ad54341f1 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -717,8 +717,9 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 3deb6c11f13441..b6102ad54341f1 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -717,8 +717,9 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
251497955f23

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

6 files changed · +14 2
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 5b8268afc0358c..b05866fd2b73fd 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -672,6 +672,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/include/asm/msr-index.h+1 0 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 5b8268afc0358c..b05866fd2b73fd 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -672,6 +672,7 @@
     /* Zen4 */
     #define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Zen 2 */
     #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index f5df16d77d5570..df6dbeeca5565e 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1146,6 +1146,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     {
     	init_amd_zen_common();
     	init_spectral_chicken(c);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index f5df16d77d5570..df6dbeeca5565e 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -1146,6 +1146,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     {
     	init_amd_zen_common();
     	init_spectral_chicken(c);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index f17ade084720d5..f4110adf086c4d 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -598,6 +598,9 @@
     /* AMD Last Branch Record MSRs */
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+3 1 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index f17ade084720d5..f4110adf086c4d 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -598,6 +598,9 @@
     /* AMD Last Branch Record MSRs */
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
    +#define MSR_ZEN4_BP_CFG			0xc001102e
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
    +
     /* Fam 17h MSRs */
     #define MSR_F17H_IRPERF			0xc00000e9
     
    -- 
    cgit 1.3-korg
    
    
    
28f5ed477eef

x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache

6 files changed · +14 6
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 66ddea295c2669..d0a0cc8e8bd999 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -767,9 +767,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/include/asm/msr-index.h+2 1 modified
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 66ddea295c2669..d0a0cc8e8bd999 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -767,9 +767,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index ec965de4abec9f..138ff22a4926a8 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -994,6 +994,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     
     	/* Correct misconfigured CPUID on some clients. */
     	clear_cpu_cap(c, X86_FEATURE_INVLPGB);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • arch/x86/kernel/cpu/amd.c+3 0 modified
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index ec965de4abec9f..138ff22a4926a8 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -994,6 +994,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
     
     	/* Correct misconfigured CPUID on some clients. */
     	clear_cpu_cap(c, X86_FEATURE_INVLPGB);
    +
    +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
    +		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
     }
     
     static void init_amd_zen3(struct cpuinfo_x86 *c)
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 9e1720d73244f6..7de315d8b24603 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -761,9 +761,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    
  • tools/arch/x86/include/asm/msr-index.h+2 2 modified
    diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
    index 9e1720d73244f6..7de315d8b24603 100644
    --- a/tools/arch/x86/include/asm/msr-index.h
    +++ b/tools/arch/x86/include/asm/msr-index.h
    @@ -761,9 +761,10 @@
     #define MSR_AMD64_LBR_SELECT			0xc000010e
     
     /* Zen4 */
    -#define MSR_ZEN4_BP_CFG                 0xc001102e
    +#define MSR_ZEN4_BP_CFG			0xc001102e
     #define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
     #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
    +#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33
     
     /* Fam 19h MSRs */
     #define MSR_F19H_UMC_PERF_CTL           0xc0010800
    -- 
    cgit 1.3-korg
    
    
    

Vulnerability mechanics

Root cause

"Improper isolation of shared resources in Zen2's op cache allows instruction corruption due to resources being improperly shared between cores."

Attack vector

This is a CPU microarchitectural hardware bug in AMD Zen2 processors where resources in the op cache are not properly isolated, potentially causing instruction corruption. The vulnerability is present on bare-metal Zen2 systems; the patch explicitly skips the fix when running under a hypervisor [patch_id=2898055]. The advisory does not specify a precise attack vector or preconditions for exploitation, but the corruption occurs at the instruction level within the CPU's op cache, meaning any code executing on an affected Zen2 core could potentially observe corrupted instructions.

Affected code

The fix modifies `arch/x86/kernel/cpu/amd.c` in the `init_amd_zen2()` function and `arch/x86/include/asm/msr-index.h` to define the new MSR bit. The patch also updates the corresponding `tools/arch/x86/include/asm/msr-index.h` file.

What the fix does

The patch adds a new MSR bit definition `MSR_ZEN2_BP_CFG_BUG_FIX_BIT` (bit 33) to the `MSR_ZEN4_BP_CFG` model-specific register [patch_id=2898055]. During Zen2 CPU initialization in `init_amd_zen2()`, the kernel now sets this bit via `msr_set_bit()` on bare-metal systems (skipping if running under a hypervisor) [patch_id=2898055]. Setting this MSR bit corrects the improper resource sharing in the op cache, preventing the instruction corruption described in the commit message.

Preconditions

  • configSystem must use an AMD Zen2 CPU
  • configSystem must not be running under a hypervisor (the fix is skipped for guests)

Generated on May 28, 2026. Inputs: CWE entries + fix-commit diffs from this CVE's patches. Citations validated against bundle.

References

8

News mentions

0

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