High severityNVD Advisory· Published Sep 24, 2025· Updated Apr 15, 2026
CVE-2025-54520
CVE-2025-54520
Description
Improper Protection Against Voltage and Clock Glitches in FPGA devices, could allow an attacker with physical access to undervolt the platform resulting in a loss of confidentiality.
Patches
0No patches discovered yet.
Vulnerability mechanics
AI mechanics synthesis has not run for this CVE yet.
References
1News mentions
0No linked articles in our index yet.