High severity7.9NVD Advisory· Published Jan 14, 2026· Updated Jun 17, 2026
CVE-2025-0647
CVE-2025-0647
Description
In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.
Affected products
23- cpe:2.3:o:arm:c1-premium_firmware:-:*:*:*:*:*:*:*
- cpe:2.3:o:arm:c1-ultra_firmware:-:*:*:*:*:*:*:*
- cpe:2.3:o:arm:cortex-a710_firmware:-:*:*:*:*:*:*:*
- cpe:2.3:o:arm:cortex-x2_firmware:-:*:*:*:*:*:*:*
- cpe:2.3:o:arm:cortex-x3_firmware:-:*:*:*:*:*:*:*
- cpe:2.3:o:arm:cortex-x4_firmware:-:*:*:*:*:*:*:*
- cpe:2.3:o:arm:cortex-x925_firmware:-:*:*:*:*:*:*:*
- cpe:2.3:o:arm:neoverse-n2_firmware:-:*:*:*:*:*:*:*
- cpe:2.3:o:arm:neoverse-v2_firmware:-:*:*:*:*:*:*:*
- cpe:2.3:o:arm:neoverse-v3_firmware:-:*:*:*:*:*:*:*
- cpe:2.3:o:arm:neoverse-v3ae_firmware:-:*:*:*:*:*:*:*
- Range: 0
- Range: 0
0+ 3 more
- (no CPE)range: 0
- (no CPE)range: 0
- (no CPE)range: 0
- (no CPE)range: 0
0+ 3 more
- (no CPE)range: 0
- (no CPE)range: 0
- (no CPE)range: 0
- (no CPE)range: 0
Patches
Vulnerability mechanics
References
2- developer.arm.com/documentation/111546nvdVendor Advisory
- graph.volerion.com/viewnvdThird Party Advisory
News mentions
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