Critical severity9.8NVD Advisory· Published Aug 13, 2021· Updated Jun 17, 2026

CVE-2021-1104

Description

The RISC-V Instruction Set Manual contains a documented ambiguity for the Machine Trap Vector Base Address (MTVEC) register that may lead to a vulnerability due to the initial state of the register not being defined, potentially leading to information disclosure, data tampering and denial of service.

Affected products

RISC-V/RISC-Vllm-create
RISC-V/Instruction Set Manualllm-fuzzy
RISCV.org/Machine Trap Base Address (MTVEC) Registerv5
Range: All versions

Patches

Vulnerability mechanics

References

riscv.org/news/2021/08/video-glitching-risc-v-chips-mtvec-corruption-for-hardening-isa-adam-zabrocki-and-alex-matrosov-def-con-29/nvdExploitVendor Advisory

News mentions

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