VYPR
Unrated severityNVD Advisory· Published Aug 20, 2018· Updated Aug 5, 2024

CVE-2018-15572

CVE-2018-15572

Description

The spectre_v2_select_mitigation function in arch/x86/kernel/cpu/bugs.c in the Linux kernel before 4.18.1 does not always fill RSB upon a context switch, which makes it easier for attackers to conduct userspace-userspace spectreRSB attacks.

Affected products

118

Patches

1
fdf82a7856b3

x86/speculation: Protect against userspace-userspace spectreRSB

https://github.com/torvalds/linuxJiri KosinaJul 26, 2018via osv
1 file changed · +7 31
  • arch/x86/kernel/cpu/bugs.c+7 31 modified
    @@ -313,23 +313,6 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
     	return cmd;
     }
     
    -/* Check for Skylake-like CPUs (for RSB handling) */
    -static bool __init is_skylake_era(void)
    -{
    -	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
    -	    boot_cpu_data.x86 == 6) {
    -		switch (boot_cpu_data.x86_model) {
    -		case INTEL_FAM6_SKYLAKE_MOBILE:
    -		case INTEL_FAM6_SKYLAKE_DESKTOP:
    -		case INTEL_FAM6_SKYLAKE_X:
    -		case INTEL_FAM6_KABYLAKE_MOBILE:
    -		case INTEL_FAM6_KABYLAKE_DESKTOP:
    -			return true;
    -		}
    -	}
    -	return false;
    -}
    -
     static void __init spectre_v2_select_mitigation(void)
     {
     	enum spectre_v2_mitigation_cmd cmd = spectre_v2_parse_cmdline();
    @@ -390,22 +373,15 @@ static void __init spectre_v2_select_mitigation(void)
     	pr_info("%s\n", spectre_v2_strings[mode]);
     
     	/*
    -	 * If neither SMEP nor PTI are available, there is a risk of
    -	 * hitting userspace addresses in the RSB after a context switch
    -	 * from a shallow call stack to a deeper one. To prevent this fill
    -	 * the entire RSB, even when using IBRS.
    +	 * If spectre v2 protection has been enabled, unconditionally fill
    +	 * RSB during a context switch; this protects against two independent
    +	 * issues:
     	 *
    -	 * Skylake era CPUs have a separate issue with *underflow* of the
    -	 * RSB, when they will predict 'ret' targets from the generic BTB.
    -	 * The proper mitigation for this is IBRS. If IBRS is not supported
    -	 * or deactivated in favour of retpolines the RSB fill on context
    -	 * switch is required.
    +	 *	- RSB underflow (and switch to BTB) on Skylake+
    +	 *	- SpectreRSB variant of spectre v2 on X86_BUG_SPECTRE_V2 CPUs
     	 */
    -	if ((!boot_cpu_has(X86_FEATURE_PTI) &&
    -	     !boot_cpu_has(X86_FEATURE_SMEP)) || is_skylake_era()) {
    -		setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
    -		pr_info("Spectre v2 mitigation: Filling RSB on context switch\n");
    -	}
    +	setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
    +	pr_info("Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch\n");
     
     	/* Initialize Indirect Branch Prediction Barrier if supported */
     	if (boot_cpu_has(X86_FEATURE_IBPB)) {
    

Vulnerability mechanics

Generated on May 9, 2026. Inputs: CWE entries + fix-commit diffs from this CVE's patches. Citations validated against bundle.

References

12

News mentions

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